Impedance analysis in a co-planar power bus interconnect prototype for low inductance switching
Konferenz: CIPS 2018 - 10th International Conference on Integrated Power Electronics Systems
20.03.2018 - 22.03.2018 in Stuttgart, Deutschland
Tagungsband: ETG-Fb. 156: CIPS 2018
Seiten: 6Sprache: EnglischTyp: PDFPersönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt
Lin, Xi; Li, Jianfeng; Johnson, C. Mark (Power Electronics Machines and Control Research Group, University of Nottingham, Nottingham, United Kingdom)
A co-planar tab-slot type of interconnection mechanism for connecting power switching devices and DC bus capacitors has been designed and a prototype embodying that mechanism has been built. The prototype is composed of a planar switching module with a double-sided tab-shaped power terminal connector, a dual polarity receiving unit and a metallised film capacitor with terminals connected to the DC-link unit in a co-axial configuration. This prototype eliminates the use of screw terminals in the connection between a switching module and DC bus as well as between DC bus and power capacitors, therefore serves to maintain a co-planar current profile throughout the power distribution path. Analysis of parasitic inductance by impedance testing and finite element simulation was performed on different parts of the prototype assembly. The results show that the total inductance in the commutation loop is less than 15 nH while the inductance generated from the power module and DC bus combined is less than 10 nH.