Power Chip Interconnections Based on TLP and Sintering of CTEMatched Conductors
Konferenz: CIPS 2018 - 10th International Conference on Integrated Power Electronics Systems
20.03.2018 - 22.03.2018 in Stuttgart, Deutschland
Tagungsband: ETG-Fb. 156: CIPS 2018
Seiten: 6Sprache: EnglischTyp: PDFPersönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt
Feisst, Markus; Schaetzle, Philip; Wilde, Juergen (University of Freiburg – IMTEK, Department of Microsystems Engineering, Laboratory for Assembly and Packaging Technology, Germany)
In this work a novel approach for power chip interconnections using a Copper-Invar-Copper composite material is presented. A 150 µm foil is tested for its suitability with different characterization methods from mechanical stability to electrical conductivity. The lower CTE compared to pure Copper was proven by optical measurement. Ribbons were diced out of the foil and mounted using the temperature stable bonding techniques Transient Liquid Phase bonding and Silver sintering. Ribbons were successfully bonded on DCB substrates, and demonstrators with Silicon chip diodes were made. Thermal cycling up to 2500 cycles with ΔT = 47 ºC showed no influence on the bond stability.