Investigation of the usage of a chip integrated sensor to determine junction temperature during power cycling tests
Konferenz: CIPS 2018 - 10th International Conference on Integrated Power Electronics Systems
20.03.2018 - 22.03.2018 in Stuttgart, Deutschland
Tagungsband: ETG-Fb. 156: CIPS 2018
Seiten: 6Sprache: EnglischTyp: PDFPersönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt
Kempiak, Carsten; Lindemann, Andreas (Otto-von-Guericke-Universität, Magdeburg, Germany)
Thal, Eckhard; Idaka, Shiori (Mitsubishi Electric Europe B.V., Ratingen, Germany)
For an exact qualification of power semiconductor devices’ power cycling withstand capability it is crucial to determine the junction temperature Tj as quickly and accurately as possible. State of the art is to measure Tj of silicon (Si) IGBTs indirectly by the VCE(T)-method, using the dependence of saturation voltage VCE on temperature at low measurement current. This method however is not applicable to silicon carbide (SiC) transistors. The purpose of this work is to evaluate a direct measurement of Tj in a power cycling test bench using a temperature sensor integrated in the transistor, i.e., a string of small diodes placed centrally in the chip. For validation, measurements taken with the sensors are compared to those gained with the conventional VCE(T)-method and simulation results. For this purpose Si IGBTs equipped with temperature sensors are evaluated. The comparison displays a good and physically plausible correlation between the Tj measurement by a sensor and the well established VCE(T)-method, which qualifies the sensor based measurement for application in power cycling; this is in particular important to expose SiC MOSFETs with anti-parallel SiC Schottky diodes to power cycling tests, where standard methods to measure Tj are not applicable. Consequently first measurements of Tj in such modules in a power cycling test are shown as well.