Coverage Measures and a Unified Coverage Model for Analog Circuit Design

Konferenz: ANALOG 2018 - 16. GMM/ITG-Fachtagung
13.09.2018 - 14.09.2018 in München/Neubiberg, Deutschland

Tagungsband: GMM-Fb. 91: ANALOG 2018

Seiten: 6Sprache: EnglischTyp: PDF

Persönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt

Autoren:
Fuertig, Andreas; Hedrich, Lars (Institute for Computer Science, Goethe Universität, Frankfurt a. M., Germany)
Hartong, Walter; Tanguay, Louis-Francois (Cadence Design Systems, München, Germany / Montreal, Canada)
Olbrich, Markus; Rechmal, Malgorzata (Institute of Microelectronic Systems, Leibniz Universität Hannover, Germany)

Inhalt:
The metric driven verification methodology using a coverage concept is well-established in digital design. Analog circuits are much more heterogeneous with continuous parameter and state spaces. Therefore, the coverage concept has not been well defined and has not been used for analog circuits so far. Rapidly increasing verification quality demand motivate a new attempt to analog verification coverage. We present a systematic approach to define coverage based verification of analog and mixed-signal circuits. A base coverage model is derived by starting from the fundamental equation system. Based on this, several applied coverage models can be identified. This leads to a set of coverage metric definitions and their relation to real-life verification tasks. Examples illustrate the presented systematic approach and how existing verification tools will fit into the coverage based methodology presented and how upcoming methods like formal analog verification help to increase the verification coverage.