A Low-Complexity Three-Error-Correcting BCH Decoder with Applications in Concatenated Codes

Konferenz: SCC 2019 - 12th International ITG Conference on Systems, Communications and Coding
11.02.2019 - 14.02.2019 in Rostock, Germany


Tagungsband: SCC 2019

Seiten: 5Sprache: EnglischTyp: PDF

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Freudenberger, Juergen; Rajab, Mohammed (Institute for System Dynamics, HTWG Konstanz, University of Applied Sciences, Germany)
Shavgulidze, Sergo (Faculty of Power Engineering and Telecommunications, Georgian Technical University, Georgia)

Error correction coding (ECC) for optical communication and persistent storage systems require high rate codes that enable high data throughput and low residual errors. Recently, different concatenated coding schemes were proposed that are based on binary Bose-Chaudhuri-Hocquenghem (BCH) codes that have low error correcting capabilities. Commonly, hardware implementations for BCH decoding are based on the Berlekamp-Massey algorithm (BMA). However, for single, double, and triple error correcting BCH codes, Peterson’s algorithm can be more efficient than the BMA. The known hardware architectures of Peterson’s algorithm require Galois field inversion. This inversion dominates the hardware complexity and limits the decoding speed. This work proposes an inversion-less version of Peterson’s algorithm. Moreover, a decoding architecture is presented that is faster than decoders that employ inversion or the fully parallel BMA at a comparable circuit size.