Monolithic integration of in-plane hybrid III-V/Si photonic devices

Konferenz: MikroSystemTechnik Kongress 2021 - Kongress
08.11.2021 - 10.11.2021 in Stuttgart-Ludwigsburg, Deutschland

Tagungsband: MikroSystemTechnik Kongress 2021

Seiten: 3Sprache: EnglischTyp: PDF

Scherrer, Markus; Tiwari, Preksha; Trivino, Noelia Vico; Mauthe, Svenja; Wen, Pengyan; Schmid, Heinz; Moselund, Kirsten Emilie (IBM Research Europe – Zurich, Rüschlikon, Switzerland)

Efficient active devices for light emission are the major missing piece in the otherwise highly advanced and low-cost silicon photonics platform. III-V semiconductors would be ideally suited for this; especially monolithic integration of the III-V material is challenging but ultimately desirable for scalable integrated circuits. Here we focus on integrated hybrid III-V/Si light emitters achieved using an integration technique called template-assisted selective epitaxy (TASE). This method relies on selective replacement of a prepatterned silicon structure with III-V material and thereby achieves self-aligned and in-plane monolithic integration of III-Vs on silicon. We discuss light emitters based on hybrid III-V/Si photonic crystal structures and highlight the benefits of locally placing the active material with high overlap to the photonic mode. This opens a new path towards realizing fully integrated, densely packed and scalable photonic integrated circuits.