Packaging of Large Area Power Chips – Extending the Limits of Standard Module Technology
Konferenz: CIPS 2006 - 4th International Conference on Integrated Power Systems
07.06.2006 - 09.06.2006 in Naples, Italy
Tagungsband: CIPS 2006
Seiten: 6Sprache: EnglischTyp: PDFPersönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt
Scheuermann, U.; Ebersberger, F. (SEMIKRON Elektronik GmbH & Co. KG, Sigmundstr. 200, 90431 Nuremberg, Germany)
Increasing the power density of the standard technology is a continuous challenge in power module development. While single chip packages like hockey pucks are available for very large die sizes, the application of these packages requires a high mechanical and constructive effort. The state-of-the-art technology for high volume phase leg modules comprises a solder connection between a chip and an insulating substrate with bond wire top surface connection and a second solder connection between the populated substrate and a base plate – but this bond wire technology is currently limited to a die size of less than 20 x 20mm2. Pushing out these limits to new frontiers is the goal of this investigation. Presenting a semi-controlled input rectifier phase leg module – composed of a thyristor and a diode of 24.3 x 24.3mm2 and 22.4 x 22.4mm2 chip size, respectively – the challenges with respect to the reliability and lifetime are explored and possible improvements to enhance the classical technology to meet the reliability requirements are presented.