Efficient Fault-Tolerant Addition by Operand Width Considerat

Konferenz: ARCS 2009 - 22th International Conference on Architecture of Computing Systems
11.03.2009 in Delft, The Netherlands

Tagungsband: ARCS 2009

Seiten: 3Sprache: EnglischTyp: PDF

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Fechner, Bernhard; Keller, Jörg (FernUniversität in Hagen, Dept. of Mathematics and Computer Science, 58084 Hagen, Germany)

Addition is a central operation in microcontrollers and hence faults should be detected for safety reasons. We extend the principle of recomputing with shifted operands (RESO) by doing the re-computation concurrently to the computation in the case of small operands. Thus, we generate a solution cheaper than two adders and faster than simple repetition. To extend RESO, we consider the actual bit-widths of the operands. We validate our method with data from static code analysis of two application kernels.