Design and implement of timing synchronizatin algorithm for OFDM PLC system in low voltage powerline networks
Konferenz: UPEC 2011 - 46th International Universities' Power Engineering Conference
05.09.2011 - 08.09.2011 in Soest, Germany
Tagungsband: UPEC 2011
Seiten: 4Sprache: EnglischTyp: PDFPersönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt
Dong, Liang; BaoHui, Zhang; DongWen, Niu (State Key Laboratory of Electrical Insulation and Power Equipment, Xi'an Jiao tong University, Xi'an, China)
Bo, Z. Q.; Klimek, A. (AREVA T&D Limited, Stafford ST17 4LX, UK)
Orthogonal Frequency Division Multiplexing (OFDM) based broadband power line communication provide better information exchange scheme for smart grid. This paper presents and analysis the design and implementation procedure of timing synchronization algorithm for OFDM system, on the TMS320C6713 Digital Signal Processor of TI, in the Low Voltage power line communication (PLC). Synchronization algorithm is one of most essential algorithms in the OFDM based broadband power line communication system. Measure based LV power line channel model was given first. Then, our synchronization method is introduced to against horrible noise and interference in LV power line channel. Preamble with special structure is used to enhance the performance of algorithm. Finally the performance on the real PLC situation is listed. The results confirmed that it is a feasible synchronization solution for power line communications.