Design of High Speed Sampling System for a FPGA-based PMSM DTC Drive System
Konferenz: UPEC 2011 - 46th International Universities' Power Engineering Conference
05.09.2011 - 08.09.2011 in Soest, Germany
Tagungsband: UPEC 2011
Seiten: 6Sprache: EnglischTyp: PDFPersönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt
Wang, Yingnan; Schäfer, Uwe (Institute of Energy and Automation, Chair of Electrical Drives, Berlin University of Technology, Germany)
In this paper a whole design of high speed measurement system for control of PMSM (permanent magnet synchronous Motor) considering the necessity of the direct torque control (DTC) is presented. Based on FPGA (Field Programmable Gate Array) and AD7864 a high speed measurement system including a CAN-UART communication system is proposed. The PMSM because of its high torque per volume ratio is now widespread for traction drive applications of electric vehicles (EV). The DTC method works with good dynamic and static performance under short sampling period. But now the traction systems of EV demand for a wide constant power range with flux weakening ratios of up to 1:5 or even higher. Therefore the proposed high speed measurement system would be implemented with a very high sampling frequency for high speed drive control.