Analysis of Aging Mitigation Techniques for Digital Circuits Considering Recovery Effects

Inhalt:
The influence of process variations as well as environmental and workload variations on the performance of an integrated circuit is getting greater with each new technology node. To better predict the degradation of circuit performances like delay and slew rate, we developed an aging aware timing model based on trapping/detrapping. With this model, which was validated with measurements from a 65 nm technology, we are not only predicting the quasi permanent degradation but also the relaxation (recovery) caused by NBTI. We are therefore now able to incorporate the influence of varying use profiles into the computation of the aging of digital circuits.