Towards more Dependable Verification of Parameter Variations using Semi-Formal Techniques

Inhalt:
Robustness of Analog/Mixed-Signal Systems against parameter variations is a key challenge. In analog components, but as well in DSP algorithms, parameters cannot be reproduced accurately. Parameter variations can lead to smaller or larger deviations of intended (‘ideal’) system properties. Depending on the inherent robustness of a design, system properties can leave the specified ranges. Unfortunately, verification of robustness of complex, heterogeneous system with many parameter deviations is a challenge. In this paper we describe a methodology for semi-symbolic verification that combines assertion-based methods for specification with semi-symbolic simulation. By assertions, we can describe the intended behaviour including particular analog behaviour and its deviations in a formalized way. By semi-symbolic simulations we can significantly increase coverage and dependability of the verification. The applicability and efficiency of the method is illustrated through a superheterodyne receiver.