Synchronization of MPI One-Sided Communication on a Non-Cache-Coherent Many-Core System
Konferenz: ARCS 2016 - 29th International Conference on Architecture of Computing Systems
04.04.2016 - 07.04.2016 in Nürnberg, Deutschland
Tagungsband: ARCS 2016
Seiten: 6Sprache: EnglischTyp: PDF
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Autoren:
Christgau, Steffen; Schnor, Bettina (Institute for Computer Science, University of Potsdam, August-Bebel-Str. 89, 14482 Potsdam, Germany)
Inhalt:
This paper discusses the design and implementation of MPI’s general active target synchronization on the Intel Single-Chip Cloud Computer, a non-cache-coherent many-core CPU. Measurements show a performance benefit of a factor of four compared to the default SCC-tuned MPI implementation and demonstrate the feasibility of implementing efficiently a shared memory protocol despite the lack of cache coherence. Further, a classification of implementation designs of MPI’s general active target synchronization is presented.