Applying Locked Loop Circuits in Voltage Regulator Modules

Konferenz: PCIM Asia 2016 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
28.06.2016 - 30.06.2016 in Shanghai, China

Tagungsband: PCIM Asia 2016

Seiten: 8Sprache: EnglischTyp: PDF

Persönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt

Huang, Yi; Cheung, Chun; Zhu, Richard (Intersil Corporation, New Jersey, USA)
Li, Lin (Intersil Corporation, Shanghai, China)

The development of future generation microprocessors is dependent on overcoming the system design challenges of Voltage Regulator Modules (VRMs). In order to tackle these challenges, locked loop circuits are implemented in power management architectures. In this paper, the benefits of phase locked loop (PLL), delay locked loop (DLL), and frequency locked loop (FLL) are reviewed and compared, mainly in terms of digital control and free running modulation techniques. Practical system design considerations are also proposed and outlined.