Evaluation of a Processor Simulator Exemplified by a Radar Processing Algorithm
Konferenz: ARCS 2017 - 30th International Conference on Architecture of Computing Systems
03.04.2017 - 06.04.2017 in Vienna, Austria
Tagungsband: ARCS 2017
Seiten: 5Sprache: EnglischTyp: PDFPersönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt
Rachuj, Sebastian; Hartmann, Christian; Fey, Dietmar (Friedrich Alexander University Erlangen-Nürnberg (FAU), Germany)
Simulation is an option to manage the complexity of heterogeneous systems which are more and more common in today’s vehicles. To estimate the real runtime of an algorithm, such a system simulator has to rely on each processor simulator it is combined of. Since fast running simulators often have a bad quality regarding the determination of non-functional properties, we compared state-of-the-art ARM models with real hardware using an algorithm for processing raw radar data as it is already used in the automotive industry. It appears that there is still need to develop better methodologies for ascertaining the runtime of an algorithm in a simulation environment.