Overview of worst case execution time analysis in single- and multicore environments
Konferenz: ARCS 2017 - 30th International Conference on Architecture of Computing Systems
03.04.2017 - 06.04.2017 in Vienna, Austria
Tagungsband: ARCS 2017
Seiten: 5Sprache: EnglischTyp: PDFPersönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt
Zoubek, Christian; Trommler, Peter (Department of Computer Science, Technische Hochschule Nürnberg Georg Simon Ohm, Nuremberg, Germany)
In safety-critical real time systems validation and verification of timings are of utmost importance. Correct behavior of both – hardware and software – need to be guaranteed for a real time system (RTS) to be certified for the usage in automotive and/or avionic domain. The calculation of an upper bound of a task’s worst case execution time(WCET) is required. In the literature several different approaches for finding more or less sharp upper bounds exist. The statical approach creates knowledge of path execution and possible execution times by investigating source or binary code and virtually running tasks in hardware models. Contrary, dynamic estimations measure various execution times of tasks directly on hardware. Hybrid techniques try to merge benefits of both approaches. In this paper a brief overview of various WCET estimation techniques is presented. As current and future computer architectures tend to use multiple computation cores, this paper also focuses on WCET estimation techniques in multicore environments.