Power Cycle Testing of Sintered SiC-MOSFETs

Konferenz: PCIM Europe 2017 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
16.05.2017 - 18.05.2017 in Nürnberg, Deutschland

Tagungsband: PCIM Europe 2017

Seiten: 8Sprache: EnglischTyp: PDF

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Autoren:
Schmidt, Ralf; Werner, Ronny (Siemens, Germany)
Casady, Jeffrey; Hull, Brett; Barkley, Adam (Wolfspeed, USA)

Inhalt:
Both in thermal resistance measurements and power cycle testing the concept of virtual junction temperature is widely used. In this contribution it is shown that this concept can be successfully transferred from Si-devices to SiC-MOSFETs when using the body diode under negative-biased gate. IR-thermography showed that, equal to Si devices, the virtual junction temperature in SiC MOSFET can be associated with the average temperature of the die’s active area. The virtual junction temperature approach could then be used to conduct power cycle tests on power devices incorporating Wolfspeed’s 2nd generation SiC-MOSFET dies. Although the stiff SiC dies produce much more stress on the die attach during cycling, it could be shown that with an optimized backside metallization and a silver sinter layer as die attach outstanding power cycle capability can be achieved. More than 1 million cycles at a temperature swing of DeltaTj =110K could be tested until cracks in the DBC led to an increase in thermal resistance and finally to a failure.