Development of an Antiserial Super Cascode for the Determination of the Grid Impedance on the Medium-Voltage Level
Konferenz: NEIS 2017 - Conference on Sustainable Energy Supply and Energy Storage Systems
21.09.2017 - 22.09.2017 in Hamburg, Deutschland
Tagungsband: NEIS 2017
Seiten: 6Sprache: EnglischTyp: PDFPersönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt
Wilken, Hauke; Moebius, Patrick; Jordan, Michael; Do, Thanh Trung; Schulz, Detlef (Helmut Schmidt University, Electrical Power Systems Holstenhofweg 85, 22043 Hamburg, Germany)
The identification of the grid impedance and its frequency characteristic is important to evaluate the effect on the power quality by electrical energy sources and loads. The measurement results can be used for an improved design of inverters and their control parameters, grid-side filters and the determination of resonance frequencies. The approach used in this contribution to determine the grid impedance is based on the switching of an ohmic load. The resulting transients in voltage and current caused by this switching can be used to calculate the frequency dependent grid impedance. In this paper the development of an antiserial super cascade circuit using SiC-Jfets for the application within the determination of the grid impedance is presented. With this switch topology high switching frequencies can be achieved which is important for a precise identification of the grid impedance especially at higher frequencies. The development of the antiserial super cascade circuit is outlined and measurement results with a prototype are shown.