COMET: a Configuration Memory Tool to Analyze, Visualize and Manipulate FPGAs Bitstream

Konferenz: ARCS Workshop 2018 - 31th International Conference on Architecture of Computing Systems
09.04.2018 - 12.04.2018 in Braunschweig, Germany

Tagungsband: ARCS 2018

Seiten: 4Sprache: EnglischTyp: PDF

Persönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt

Bozzoli, Ludovica; Sterpone, Luca (Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy)

Nowadays Xilinx Tools trend is to increase design abstraction level. This allows users to create complex FPGA-based projects and designs without the needs of in-depth knowledge of low level resources implementation and configuration memory usage. The design automation has the advantage to make the development process more rapid and affordable for a larger range of users. On the other hand, this trend has the drawback of the lack of accessibility to low level information, above all on FPGA fabric and configuration memory. This is crucial in research, especially the one oriented to the development of specific mission critical applications. In the aerospace fields an in-depth knowledge of the device is fundamental to guarantee high performances and high dependability to the application. In this paper we propose COMET: an interface at the lowest level to enable the study of SRAM-based FPGA’s configuration memory, allowing the visualization, the analysis and the manipulation of its content. This tool allows bitstream decryption and, bitstream fine-grained modification as consequence. These features provide efficient means to perform detailed fault injection and simulation or to cleverly perform Partial Dynamic Reconfiguration, increasing dependability and performances of FPGA-based aerospace mission critical applications.