Avalanche Rugged Low On-Resistance 1200 V SiC MOSFETs With Long-Term Stability
Konferenz: PCIM Europe 2018 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
05.06.2018 - 07.06.2018 in Nürnberg, Deutschland
Tagungsband: PCIM Europe 2018
Seiten: 6Sprache: EnglischTyp: PDF
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Autoren:
Lee, Kwangwon (ON Semiconductor, South Korea)
Domeij, Martin; Franchi, Jimmy; Buono, Benedetto; Allerstam, Fredrik (ON Semiconductor, Sweden)
Neyer, Thomas (ON Semiconductor, Germany)
Inhalt:
1200V SiC MOSFETs with low on-resistance were fabricated on 6 inch wafers and characterized to assess the device ruggedness and reliability. TCAD simulations with oxide interface traps were performed and compared with the target device output characteristics with Rsp = 4.4 mOmega.cm2. To investigate the device ruggedness and oxide quality, wafer level unclamped inductive switching (UIS), gate oxide integrity (GOI), and time-dependent dielectric breakdown (TDDB) tests were conducted. In addition, positive and negative bias threshold voltage stress test and high temperature reverse bias (HTRB) stress test were performed to access the long term stability. Good avalanche ruggedness statistics and reliable oxide quality were shown and improved VTH stability during stress test was found compared to three similarly rated commercially available SiC MOSFETs.