Design and Verification of a Cascaded Advanced AC-Simulator with Virtual Output Impedance

Inhalt:
Recently, a three-phase SiC-based AC power source concept with virtual output impedance control has been proposed, analyzed and verified. However, the system showed some limitations in terms of accuracy of current and/or voltage measurements and thus could only fulfill required output characteristics at maximum nominal output current and emulated impedance settings if both fundamental and harmonic components will be generated by only one three-phase switched mode amplifier. These restrictions can be removed by splitting the three-phase power system into two separate converter topologies which have to be connected in series at their respective outputs in order to provide fundamental and harmonic voltages for an unknown device under test. The additional (small-signal) inverter merely has to provide voltage signals at the output which are much smaller than the fundamental voltage. Therefore, voltage sensors with higher resolution can be employed. Depending on the applied semiconductor technology, even switching frequencies, higher than 200 kHz can be applied for this small-signal extension. The design and verification of such a cascaded AC power source with virtual output impedance - which is mainly used for the development, validation and testing of grid connected components is presented in this work. Since the cascaded system consists of at least two inverter systems, the coupling of the small -and the large signal inverters will be also presented and discussed.