Evaluating HSA-Compatible Heterogeneous Systems for ADAS Applications

Konferenz: ARCS Workshop 2019 - 32nd International Conference on Architecture of Computing Systems
20.05.2019 - 21.05.2019 in Copenhagen, Denmark

Tagungsband: ARCS 2019

Seiten: 8Sprache: EnglischTyp: PDF

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Autoren:
Bauer, Wolfgang; Holzinger, Philipp; Rachuj, Sebastian; Haeublein, Konrad; Reichenbach, Marc; Fey, Dietmar (Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany)

Inhalt:
The need for more computational power leads to the usage of heterogeneous systems within today’s embedded systems. Even reconfigurable hardware like FPGAs and custom-made ASICs find their way into vehicles. However, programming and deciding for the best-suited hardware design is a difficult task. When one hardware architecture was chosen, even the software had to be adjusted to be compatible. New standards as published by the Heterogeneous Systems Architecture Foundation make it easier to reuse old components on new hardware since certain steps of starting jobs on accelerator cores like dispatching kernels are standardized. In this paper three common ways to use customizable accelerators were selected and compared regarding their programmability and their speed. The first approach contains manually designing accelerators and implementing them on FPGAs. As the next step, hardware generated using High Level Synthesis from high-level programming languages is investigated. Finally, an adjustable vector processing unit is looked upon which is prototyped on an FPGA. For these approaches, strengths and weaknesses could be identified helping in future decisions regarding the required accelerator