ZUCL 2.0: Virtualised Memory and Communication for ZYNQ UltraScale+ FPGAs

Konferenz: FSP Workshop 2019 - Sixth International Workshop on FPGAs for Software Programmers
12.09.2019 in Barcelona, Spain

Tagungsband: Sixth International Workshop on FPGAs for Software Programmers (FSP 2019)

Seiten: 9Sprache: EnglischTyp: PDF

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Pham, Khoa Dang; Paraskevas, Kyriakos; Vaishnav, Anuj; Vesper, Malte; Koch, Dirk (Department of Computer Science, The University of Manchester, Manchester, UK)
Attwood, Andrew (Science and Technology Facilities Council, UK)

This paper introduces ZUCL 2.0, which extends abstraction services for FPGA applications on ARM-FPGA hybrids. The ZUCL 2.0 management services include 1) FPGA multi-tasking and context-switching based on dynamic reconfiguration and cooperative scheduling, 2) communication abstraction based on the ARM AMBA standard, and 3) memory isolation for privacy and security purposes. Moreover, FPGA applications deployed on ZUCL 2.0 and the ZUCL 2.0 kernel itself can be built and maintained independently. This is a crucial feature for higher design productivity and more flexible system updates. Prototypes were implemented for latest Xilinx UltraScale+ ZCU102, UltraZed and Ultra96 platforms to demonstrate the capabilities of ZUCL 2.0.