Design and implementation of IEEE 802.1AS protocol based on FPGA
Konferenz: ISCTT 2021 - 6th International Conference on Information Science, Computer Technology and Transportation
26.11.2021 - 28.11.2021 in Xishuangbanna, China
Tagungsband: ISCTT 2021
Seiten: 4Sprache: EnglischTyp: PDFPersönliche VDE-Mitglieder erhalten auf diesen Artikel 10% Rabatt
Lin, Haijiao; Xu, Yanli; Ma, Guiyang; Zhu, Huali; Xu, Wanping; Yang, Hua (School of Information Engineering Shanghai Maritime University, Shanghai, China)
With the rapid development of autonomous driving and Internet of vehicles technology, the real-time demand of on-board Ethernet transmission is increasing day by day, the clock synchronization between devices is becoming more precise, the design of time synchronization system based on IEEE 802. 1AS can ensure the accuracy of time synchronization. This paper introduces the basic principle of IEEE 802. 1AS protocol, the state machine is used to describe the message interaction and the method of obtaining the timestamp in the system, a peer-to-peer delay measurement mechanism is used to measure path delay, send Sync packets in one step to correct errors between the primary and secondary systems. The basic functions such as path delay measurement and time synchronization in AS protocol are realized based on FPGA. After testing, the time synchronization accuracy of the scheme is close to 14.5us. This scheme provides a low-cost, simple and reliable time synchronization method for time-sensitive vehicle applications.