Improved Power Cycling Reliability through the use of SmartSiC TM) Engineered Substrate for Power Devices

Inhalt:
The Smart Cut(TM) technology enables the integration of a very high quality SiC layer transfer for device yield optimization, combined with a low resistivity handle wafer to lower device conduction and switching losses. With this new SmartSiC(TM) substrate, Schottky barrier vertical structures were prepared for power cycling tests (PCT) measurements. The devices' thermal resistance, RTH, remained within the specifications of AQG324 for more than 250k cycles for samples prepared from SmartSiC(TM) substrates. In addition to a higher current rating (up to 20%) and a simplification of the device fabrication process by skipping the annealing of the ohmic contact, SmartSiC(TM) substrates open the way to a more reliable SiC die attach within the power module.