Busbar Optimization Design for Low Parasitic Inductance SiC Power Module

Konferenz: PCIM Europe 2023 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management
09.05.2023-11.05.2023 in Nürnberg, Germany

doi:10.30420/566091264

Tagungsband: PCIM Europe 2023

Seiten: 5Sprache: EnglischTyp: PDF

Autoren:
Wang, Wenbo; Harris, Anne; Wang, Yangang (Dynex Semiconductor Ltd, UK)

Inhalt:
SiC devices have the advantages of fast switching speed, imposing higher requirements on power mod-ule packaging, especially the power loop parasitic inductance. Therefore, SiC power module package design is one of the hot topics, which is a repetitive process of optimization. In this paper, the concept design of a SiC power module is introduced. In order to achieve low inductance, the busbar is optimized by using the proximity effect within the power commutation loop. Finally, the power loop inductance is reduced by 41% from 8.18nH to 4.81nH, which is a great improvement and shows the importance of utilizing the proximity effect for power module design.