A Simulation Model for SiC Power Devices Including Thermal Effects and Package Parasitics

Inhalt:
This work presents a compact model for the simulation of silicon carbide MOSFETs. The model is based on the BSIM3 compact model, which is extensively used for the modeling of submicron silicon MOSFETs, and extended with enhanced equations to account for the drift region resistance, the capacitive behavior, the body diode and the parasitic shell of a vertical power transistor. The model is tested on a commercial 1200 V, 75m SiC MOSFET. The model can closely reproduce the static I-V characteristics at room temperature and at varying temperatures, the C-V behavior and frequency-dependent S-parameter measurements. It is able to fit the output I-V characteristics with an average error of 0.34 A, the capacitances with an average error of 2.11% and the reflective and transmissive S-parameters with an average error vector magnitude of 0.022 and 0.64 dB, respectively. The model is validated using double pulse test measurements, the switching energies can be replicated with a maximum error of 8.27 muJ at 800 V and 24 A.