A Novel Output Load Transient Optimization Approach for Multiphase VRM Design

Inhalt:
With the increasing stringent requirement on load transient for the current Intel VRM requirement, passing high repetitive rate load transient is still the key challenges in the design. In most worse PCB design cases, load transient still fails despite the best optimization on control parameters implementation. In this paper, a novel approach based on a not good filter stage design is proposed for the load transient optimization though the analysis of VRM’s small signal model. The theoretical transient optimization method is therefore illustrated and verified though simulation. Finally, experiment is conducted to verify the result. It is shown that the proposed method is useful to guide the practical VRM design in terms of load transient improvement.