IEC TR 61189-5-506:2019
Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 5-506: General test methods for materials and assemblies - An intercomparison evaluation to implement the use of fine-pitch test structures for surface insulation resistance (SIR) testing of solder fluxes in accordance with IEC 61189-5-501
Sprache: EN - englisch
Seitenzahl: 23 VDE-Artnr.: 247783
IEC TR 61189-5-506:2019(E) is an intercomparison supporting the development of IEC 61189-5-501 in relation to the SIR method. This document sets out to validate the introduction of a new 200-æm gap SIR pattern, and was benched marked against existing SIR gap patterns of 318 æm and 500 æm.